Invention Grant
- Patent Title: Insulated gate semiconductor device having trench termination structure and method
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Application No.: US16134598Application Date: 2018-09-18
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Publication No.: US11081554B2Publication Date: 2021-08-03
- Inventor: Zia Hossain , Tetsuro Asano , Syoji Miyahara , Yasuyuki Sayama
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agent Kevin B. Jackson
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/06 ; H01L29/08 ; H01L29/66 ; H01L29/78 ; H01L29/739 ; H01L29/872 ; H01L29/40 ; H01L29/36 ; H01L29/10 ; H01L29/812 ; H01L21/3065 ; H01L29/417

Abstract:
A semiconductor device structure includes a region of semiconductor material comprising a first conductivity type, an active region, and a termination region. A first active trench structure is disposed in the active region, and a second active trench structure is disposed in the active region and laterally separated from the first active trench by an active mesa region having a first width. A first termination trench structure is disposed in the termination region and separated from the second active trench by a transition mesa region having a second width and a higher carrier charge than that of the active mesa region. In one example, the second width is greater than the first width to provide the higher carrier charge. In another example, the dopant concentration in the transition mesa region is higher than that in the active mesa region to provide the higher carrier charge. The semiconductor device structure exhibits improved device ruggedness including, for example, improve unclamped inductive switching (UIS) performance.
Public/Granted literature
- US20190115436A1 INSULATED GATE SEMICONDUCTOR DEVICE HAVING TRENCH TERMINATION STRUCTURE AND METHOD Public/Granted day:2019-04-18
Information query
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