Invention Grant
- Patent Title: Tunnel field-effect transistor having a stacked structure including a first active region and a second active region
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Application No.: US16466153Application Date: 2017-11-17
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Publication No.: US11081550B2Publication Date: 2021-08-03
- Inventor: Koichi Matsumoto
- Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Applicant Address: JP Kanagawa
- Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Current Assignee Address: JP Kanagawa
- Agency: Sheridan Ross P.C.
- Priority: JPJP2016-241102 20161213
- International Application: PCT/JP2017/041446 WO 20171117
- International Announcement: WO2018/110202 WO 20180621
- Main IPC: H01L29/16
- IPC: H01L29/16 ; H01L29/76 ; H01L29/78

Abstract:
A tunnel field-effect transistor has a stacked structure including a second active region, a first active region, and a control electrode. The first active region includes a first-A active region and a first-B active region between the first-A active region and a first active region extension portion. A second active region exists below the first-A active region, and the second active region does not exist below the first-B active region. Where an orthographic projection image of the second active region and an orthographic projection image of the first active region overlap with each other is defined as L2-Total, and a length in a Y direction of the first active region is defined as L1-Y, when an axial direction of the first active region is defined as an X direction, and a stacked direction of the stacked structure is defined as a Z direction, L1-Y
Public/Granted literature
- US20200066844A1 TUNNEL FIELD-EFFECT TRANSISTOR Public/Granted day:2020-02-27
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