Invention Grant
- Patent Title: Method for generating a bias current for biasing a differential pair of transistors and corresponding integrated circuit
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Application No.: US16425437Application Date: 2019-05-29
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Publication No.: US11031917B2Publication Date: 2021-06-08
- Inventor: Vincent Binet , Yohan Joly
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Crowe & Dunlevy
- Priority: FR1854778 20180601
- Main IPC: H03F3/45
- IPC: H03F3/45

Abstract:
An operational amplifier integrated circuit includes a differential pair of transistors having a first input, a second input. A bias current generator applies a bias current to an output of the differential pair of transistors. A control loop generates a control voltage arising from a difference in potentials between the first input and the second input. An additional current that is added to the bias current is generated in response to the control voltage.
Public/Granted literature
- US2160102A Display rack Public/Granted day:1939-05-30
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