Invention Grant
- Patent Title: 3D vertical FET with top and bottom gate contacts
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Application No.: US16580829Application Date: 2019-09-24
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Publication No.: US11031296B2Publication Date: 2021-06-08
- Inventor: Brent A. Anderson , Albert M. Chu
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Randall Bluestone
- Main IPC: H01L21/82
- IPC: H01L21/82 ; H01L21/8234 ; H01L23/535 ; H01L29/78 ; H01L29/423 ; H01L23/00 ; H01L23/48 ; H01L27/088 ; H01L29/66 ; H01L21/768 ; H01L21/8238 ; H01L27/092
Abstract:
A method for forming a semiconductor device includes flipping a vertical transistor including a bottom side having at least one connection to at least one bottom side metallization structure, and, after flipping the vertical transistor, forming at least one top side metallization structure having at least one connection to a top side of the vertical transistor.
Public/Granted literature
- US20200020591A1 3D VERTICAL FET WITH TOP AND BOTTOM GATE CONTACTS Public/Granted day:2020-01-16
Information query
IPC分类:
