Medium access control circuit, data processing method, and related device
Abstract:
A medium access control circuit includes a processor, N hardware queues, and an interface circuit, where the N hardware queues are divided into a plurality of hardware queue groups. Where the first hardware queue group corresponds to a network property of the data frame based on a first mapping relationship, the first hardware queue corresponds to a service type of the data frame based on a second mapping relationship, the first mapping relationship includes mappings from network properties to hardware queue groups, and the second mapping relationship includes mappings from a plurality of service types to a plurality of hardware queues in the hardware queue group corresponding to the network property of the data frame; and then, the interface circuit sends the data frame from the N hardware queues through a radio channel.
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