Invention Grant
- Patent Title: Methods of forming integrated circuitry
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Application No.: US16596423Application Date: 2019-10-08
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Publication No.: US11024735B2Publication Date: 2021-06-01
- Inventor: Sanh D. Tang , Hong Li , Erica L. Poelstra
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/78 ; H01L29/66 ; H01L21/8234 ; H01L21/02 ; H01L21/3105 ; H01L29/10 ; H01L23/528 ; H01L29/06 ; H01L21/308 ; H01L21/311 ; H01L27/108 ; H01L27/24 ; H01L21/762 ; H01L23/49 ; H01L21/764

Abstract:
Some embodiments include an assembly having pillars of semiconductor material arranged in rows extending along a first direction. The rows include spacing regions between the pillars. The rows are spaced from one another by gap regions. Two conductive structures are within each of the gap regions and are spaced apart from one another by a separating region. The separating region has a floor section with an undulating surface that extends across semiconductor segments and insulative segments. The semiconductor segments have upper surfaces which are above upper surfaces of the insulative segments; Transistors include channel regions within the pillars of semiconductor material, and include gates within the conductive structures. Some embodiments include methods for forming integrated circuitry.
Public/Granted literature
- US20200052113A1 Methods of Forming Integrated Circuitry Public/Granted day:2020-02-13
Information query
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