A semiconductor device includes a semiconductor substrate and a pair of memory device structures. The semiconductor substrate includes a common source/drain region and a pair of individual source/drain regions, in which the common source/drain region is between the individual source/drain regions. The memory device structures each corresponds to one of the individual source/drain regions. Each memory device structure includes a trap storage structure, a control gate, a cap structure, and a word line. The trap storage structure is between the common source/drain region and the corresponding individual source/drain region. The control gate is over the trap storage structure. The cap structure is over the control gate, in which the cap structure comprises a nitride layer over the control gate and an oxide layer over the nitride layer. The word line is over the semiconductor substrate and laterally spaced from the control gate.