Invention Grant
- Patent Title: MIPI D-PHY receiver auto rate detection and high-speed settle time control
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Application No.: US16591719Application Date: 2019-10-03
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Publication No.: US11023409B2Publication Date: 2021-06-01
- Inventor: Yasser Ahmed , Ying Duan , Shih-Wei Chou
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Main IPC: G06F13/42
- IPC: G06F13/42

Abstract:
System, methods and apparatus are described that support multimode operation of a data communication interface. An apparatus includes a physical layer interface coupled to a serial bus and configurable for a high-speed mode of communication and a low-speed mode of communication, and a rate detector configured to receive a clock signal from the serial bus, and to use a reference clock to determine a unit interval representative of a data rate of the serial bus. The apparatus may also include interval calculation logic configured to determine an interval related to timing of a data signal transmitted on the serial bus, the interval having a duration expressed as a number of cycles of the reference clock. The physical layer interface may be configured to use the interval to capture data in the data signal.
Public/Granted literature
- US20210103547A1 MIPI D-PHY RECEIVER AUTO RATE DETECTION AND HIGH-SPEED SETTLE TIME CONTROL Public/Granted day:2021-04-08
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