Invention Grant
- Patent Title: Vertical memory device and method for fabricating vertical memory device
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Application No.: US16686455Application Date: 2019-11-18
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Publication No.: US10998316B2Publication Date: 2021-05-04
- Inventor: Nam-Jae Lee
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2019-0090884 20190726
- Main IPC: H01L21/50
- IPC: H01L21/50 ; H01L27/102 ; H01L27/108 ; H01L25/00 ; H01L21/02 ; H01L21/306 ; H01L21/762 ; H01L21/3213 ; H01L21/768 ; H01L23/00 ; H01L25/18 ; H01L29/66

Abstract:
A method for fabricating a vertical memory device includes: forming a memory cell array that includes a vertical thyristor and a word line over a first substrate; forming a peripheral circuit unit in a second substrate; bonding the memory cell array with the peripheral circuit unit; removing the first substrate to expose one side of the vertical thyristor; and forming a bit line that is coupled to the one side of the vertical thyristor and the peripheral circuit unit.
Public/Granted literature
- US20210028174A1 VERTICAL MEMORY DEVICE AND METHOD FOR FABRICATING VERTICAL MEMORY DEVICE Public/Granted day:2021-01-28
Information query
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