Invention Grant
- Patent Title: Flit-based packetization
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Application No.: US16439582Application Date: 2019-06-12
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Publication No.: US10997111B2Publication Date: 2021-05-04
- Inventor: Debendra Das Sharma
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alliance IP, LLC
- Main IPC: G06F13/42
- IPC: G06F13/42

Abstract:
A flit-based packetization approach is used for transmitting information between electronic components. A protocol stack can generate transaction layer packets from information received from a transmitting device, assemble the transaction layer packets into one or more flits, and protect the flits with a flit-level cyclic redundancy check (CRC) scheme. The assembled flits can be transmitted across one or more serial point-to-point interconnects in a link connecting the transmitting device to a receiving device. The protocol stack can protect flit information sent across each point-to-point interconnect with a lane-level interleaved forward error correction (FEC) scheme.
Public/Granted literature
- US20190294579A1 FLIT-BASED PACKETIZATION Public/Granted day:2019-09-26
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