Invention Grant
- Patent Title: Deterministic read disturb counter-based data checking for NAND flash
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Application No.: US16811775Application Date: 2020-03-06
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Publication No.: US10996870B2Publication Date: 2021-05-04
- Inventor: Neil Buxton
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Tokyo
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Tokyo
- Agency: White & Case LLP
- Main IPC: G11C16/14
- IPC: G11C16/14 ; G06F3/06 ; G11C16/34 ; G06F11/07 ; G11C16/04

Abstract:
A data storage device comprises a non-volatile semiconductor memory device and a solid-state drive controller communicatively coupled to the non-volatile semiconductor memory device. The non-volatile semiconductor memory device can store data in memory blocks. The solid-state drive controller can, periodically, retrieve counts from a counter table, select a predetermined number of memory blocks corresponding to the lowest counts, and determine an integrity of the stored data in each of the predetermined number of memory blocks. Each count can correspond to a difference between a count limit and a number of read operations performed on one of the memory blocks.
Public/Granted literature
- US20200278800A1 DETERMINISTIC READ DISTURB COUNTER-BASED DATA CHECKING FOR NAND FLASH Public/Granted day:2020-09-03
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