A power supply has a reference regulation circuit and a voltage regulator. The reference regulation circuit receives a VID code and a slew rate command from a processor and regulates a reference voltage based on the VID code and the slew rate command. The voltage regulator converts an input voltage to an output voltage based on the reference voltage. The circuit has a Σ-Δ modulation unit to generate a count duration signal based on a target count signal, wherein the target count signal is generated by dividing a voltage regulation step by the slew rate command, both the target count signal and the count duration signal are digital signals, the target count signal represents a real number having an integer part and a decimal part, the count duration signal represents an integer number, the circuit further regulates the reference voltage based on the count duration signal and the VID code.