Priority encoded data slice retention
Abstract:
A computing device includes an interface configured to interface and communicate with a dispersed storage network (DSN), a memory that stores operational instructions, and processing circuitry operably coupled to the interface and to the memory. The processing circuitry is configured to execute the operational instructions to perform various operations and functions. The computing device detects a total number of errors that is associated with a set of memory devices of one or more sets of storage units (SUs) within a DSN that distributedly store a set of encoded data slices (EDSs). When the total number of errors compares unfavorably to a priority error threshold level, the computing device indicates that a minimum number of error-free EDSs are available of the set of EDSs. The computing device also selects a mechanism for data retention process from a plurality of mechanisms for data retention process and executes it.
Information query
Patent Agency Ranking
0/0