Invention Grant
- Patent Title: Multi terminal device stack formation methods
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Application No.: US16148308Application Date: 2018-10-01
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Publication No.: US10971680B2Publication Date: 2021-04-06
- Inventor: Thomas Boone , Pradeep Manandhar , Girish Jagtini , Yuan-Tung Chin , Elizabeth Dobisz , Mustafa Pinarbasi
- Applicant: SPIN MEMORY, Inc.
- Applicant Address: US CA Fremont
- Assignee: SPIN MEMORY, Inc.
- Current Assignee: SPIN MEMORY, Inc.
- Current Assignee Address: US CA Fremont
- Main IPC: H01L43/12
- IPC: H01L43/12 ; H01L43/02 ; H01F10/32 ; H01F41/34 ; H01L27/22

Abstract:
Embodiments of the present invention include multiple independent terminals for a plurality of devices in a stack configuration within a semiconductor. In one embodiment, a multi terminal fabrication process comprises: performing an initial pillar layer formation process to create layers of a multi terminal stack; forming a first device in the layers of the multi terminal stack; forming a second device in the layers of the multi terminal stack; and constructing a set of terminals comprising: a first terminal coupled to the first device, a second terminal coupled to the second device; and a third terminal coupled to the first device; wherein at least two terminals in the set of terminals are independent. The third terminal can be coupled to the second device.
Information query
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