A memory device having a wake-up protocol is disclosed. The memory device comprises a plurality of bitcells operative in a deep-sleep mode having corresponding bitline pairs coupled to the plurality of bitcells, a first PFET coupled between a core voltage supply and the plurality of bitcells configured to supply a core voltage to the plurality of bitcells, and a second PFET having a drain coupled to the plurality of bitcells, a source coupled to a gate of the first PFET, and a gate configured to receive a first wake signal to enable precharge of the plurality of bitcells.