Invention Grant
- Patent Title: Interfacial layer between fin and source/drain region
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Application No.: US16570144Application Date: 2019-09-13
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Publication No.: US10944005B2Publication Date: 2021-03-09
- Inventor: Chih-Yun Chin , Chii-Horng Li , Chien-Wei Lee , Hsueh-Chang Sung , Heng-Wen Ting , Roger Tai , Pei-Ren Jeng , Tzu-Hsiang Hsu , Yen-Ru Lee , Yan-Ting Lin , Davie Liu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/165 ; H01L29/08 ; H01L21/762 ; H01L21/8234
Abstract:
An embodiment is a semiconductor structure. The semiconductor structure includes a substrate. A fin is on the substrate. The fin includes silicon germanium. An interfacial layer is over the fin. The interfacial layer has a thickness in a range from greater than 0 nm to about 4 nm. A source/drain region is over the interfacial layer. The source/drain region includes silicon germanium.
Public/Granted literature
- US20200006548A1 Interfacial Layer Between Fin and Source/Drain Region Public/Granted day:2020-01-02
Information query
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