- Patent Title: Digital alloy based back barrier for P-channel nitride transistors
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Application No.: US16829865Application Date: 2020-03-25
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Publication No.: US10943998B2Publication Date: 2021-03-09
- Inventor: Rongming Chu , Yu Cao
- Applicant: HRL Laboratories, LLC
- Applicant Address: US CA Malibu
- Assignee: HRL Laboratories, LLC
- Current Assignee: HRL Laboratories, LLC
- Current Assignee Address: US CA Malibu
- Agency: Ladas & Parry
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L29/15 ; H01L29/205 ; H01L29/66 ; H01L29/20 ; H01L29/207 ; H01L29/423

Abstract:
A III-nitride power handling device and the process of making the III-nitride power handling device are disclosed that use digital alloys as back barrier layer to mitigate the strain due to lattice mismatch between the channel layer and the back barrier layer and to provide increased channel conductivity. An embodiment discloses a GaN transistor using a superlattice binary digital alloy as back barrier comprising alternative layers of AlN and GaN. Other embodiments include using superlattice structures with layers of GaN and AlGaN as well as structures using AlGaN/AlGaN stackups that have different Aluminum concentrations. The disclosed device has substantially increased channel conductivity compared to traditional analog alloy back barrier devices.
Public/Granted literature
- US20200227542A1 DIGITAL ALLOY BASED BACK BARRIER FOR P-CHANNEL NITRIDE TRANSISTORS Public/Granted day:2020-07-16
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