Semiconductor storage device
Abstract:
A semiconductor storage device includes a plurality of memory cells and a first circuit. The first circuit is configured to read data from a subset of the memory cells, such as a page unit or the like, then determine whether the data as read from the subset contains an error. The first circuit calculates a bit error rate for the subset if the subset contains an error and performs a recovery processing on the subset if the calculated bit error rate is less than a first threshold value but greater than a second threshold value.
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