Invention Grant
- Patent Title: Integrated circuit layouts with line-end extensions
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Application No.: US16686448Application Date: 2019-11-18
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Publication No.: US10943054B2Publication Date: 2021-03-09
- Inventor: Hsien-Huang Liao , Tung-Heng Hsieh , Bao-Ru Young , Yung Feng Chang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- Main IPC: G06F30/398
- IPC: G06F30/398 ; G06F30/39 ; G06F30/367 ; G03F1/36 ; G06F119/06

Abstract:
Various examples of integrated circuit layouts with line-end extensions are disclosed herein. In an example, a method includes receiving an integrated circuit layout that contains: a first and second set of shapes extending in parallel in a first direction, wherein a pitch of the first set of shapes is different from a pitch of the second set of shapes. A cross-member shape is inserted into the integrated circuit layout that extends in a second direction perpendicular to the first direction, and a set of line-end extensions is inserted into the integrated circuit layout that extend from each shape of the first set of shapes and the second set of shapes to the cross-member shape. The integrated circuit layout containing the first set of shapes, the second set of shapes, the cross-member shape, and the set of line-end extensions is provided for fabricating an integrated circuit.
Public/Granted literature
- US20200082055A1 Integrated Circuit Layouts with Line-End Extensions Public/Granted day:2020-03-12
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