Invention Grant
- Patent Title: Memory device and method of operation
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Application No.: US16574669Application Date: 2019-09-18
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Publication No.: US10937501B2Publication Date: 2021-03-02
- Inventor: Shigekazu Yamada
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C16/08
- IPC: G11C16/08 ; G11C16/30 ; G11C16/04 ; G11C16/14 ; G11C16/26 ; G11C16/10 ; G11C5/14 ; G11C16/32 ; G11C11/56

Abstract:
Discussed herein are systems and methods for charging an access line to a nonvolatile memory cell during a standby state, such as to prevent or mitigate standby-state charge loss. An embodiment of a memory device comprises a memory cell, a string driver circuit, and a charging circuit. The string driver circuit is coupled to the memory cell via a local word line, and has a common p-well. The charging circuit, in response to a voltage of a global word line of the memory device falling below a reference voltage during a standby state, couple a supply voltage to the common p-well of the string driver circuit to charge the global word line to a positive bias potential. The memory device includes a leakage compensation circuit to compensate for the junction leakage.
Public/Granted literature
- US20200013467A1 MEMORY DEVICE AND METHOD OF OPERATION Public/Granted day:2020-01-09
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