Invention Grant
- Patent Title: Memory system and information processing system
-
Application No.: US15162035Application Date: 2016-05-23
-
Publication No.: US10936410B2Publication Date: 2021-03-02
- Inventor: Naoaki Tsutsui
- Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Applicant Address: JP Atsugi
- Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Current Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Current Assignee Address: JP Atsugi
- Agency: Nixon Peabody LLP
- Agent Jeffrey L. Costellia
- Priority: JPJP2015-106706 20150526
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/10 ; G06F11/22 ; G11C29/38 ; G11C29/44 ; G11C11/408 ; H01L27/108 ; G11C11/405 ; H01L27/12 ; G11C29/52 ; G06F11/30 ; G11C29/04

Abstract:
A memory system that includes an error check and correct (ECC) circuit is provided. The memory system includes a memory, a circuit, and a processor. The memory system has a function of receiving write data from the outside. The memory includes a user data region, a first management region, and a second management region. The user data region stores the write data. The circuit has a function of performing ECC processings on the write data read from the user data region. The first management region stores data that indicates whether the user data region has stored the write data or not. The second management region stores data that indicates whether the circuit has performed the ECC processings on the write data read from the user data region or not.
Public/Granted literature
- US20160350182A1 MEMORY SYSTEM AND INFORMATION PROCESSING SYSTEM Public/Granted day:2016-12-01
Information query