Invention Grant
- Patent Title: Microcontroller with error signal output circuit and control method of the same
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Application No.: US16048282Application Date: 2018-07-29
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Publication No.: US10915082B2Publication Date: 2021-02-09
- Inventor: Takuro Nishikawa , Masaki Fujigaya
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: SGPatents PLLC
- Priority: JP2017-184355 20170926
- Main IPC: G06F11/18
- IPC: G06F11/18 ; G05B19/042 ; G06F1/3206 ; G06F1/3287 ; G06F1/3234 ; G06F11/16 ; G06F11/36 ; G06F1/20 ; G06F1/3293

Abstract:
To provide a microcontroller that suppresses increase of power consumption during debugging, a microcontroller according to the present invention includes a first signal processing circuit, a second signal processing circuit that performs signal processing in the same manner as the first signal processing circuit, a comparing circuit that compares a processing result of the first signal processing circuit and a processing result of the second signal processing circuit with each other, and outputs an error signal when an error is detected, a suppressing signal input unit that receives a suppressing signal for suppressing an operation of the second signal processing circuit and an operation of the comparing circuit, a suppressing circuit that receives the suppressing signal from the suppressing signal input unit and suppresses the operation of the second signal processing circuit and the operation of the comparing circuit, and a pseudo error signal output circuit that outputs a pseudo error signal in place of the error signal, when the operation of the second signal processing circuit and the operation of the comparing circuit are suppressed.
Public/Granted literature
- US20190094830A1 MICROCONTROLLER AND CONTROL METHOD OF THE SAME Public/Granted day:2019-03-28
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