According to an aspect of the disclosure, processing circuitry decodes a constrain flag from a coded video bitstream. The constrain flag is indicative of an exclusion of decoder-side motion vector derivation (DMVD) for reference sample reconstruction. Further, the processing circuitry decodes prediction information of a current block from the coded video bitstream. The prediction information is indicative of an intra prediction mode. Then, the processing circuitry determines, in a same picture as the current block, reference samples for a sample in the current block based on the intra prediction mode and based on the exclusion of the DMVD, and reconstructs the sample of the current block according to the reference samples.