Invention Grant
- Patent Title: Semiconductor device, semiconductor system, and semiconductor device manufacturing method
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Application No.: US16045016Application Date: 2018-07-25
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Publication No.: US10911042B2Publication Date: 2021-02-02
- Inventor: Kazuki Fukuoka , Toshifumi Uemura , Yuko Kitaji
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP2017-168124 20170901
- Main IPC: H03K17/22
- IPC: H03K17/22 ; G06F1/28 ; G05F3/24

Abstract:
There is a need to provide a semiconductor device, a semiconductor system, and a semiconductor device manufacturing method capable of accurately monitoring a minimum operating voltage for a monitoring-targeted circuit. A monitor portion of a semiconductor system according to one embodiment includes a voltage monitor and a delay monitor. The voltage monitor is driven by power-supply voltage SVCC different from power-supply voltage VDD supplied to an internal circuit as a monitoring-targeted circuit and monitors power-supply voltage VDD. The delay monitor is driven by power-supply voltage VDD and monitors signal propagation time for a critical path in the internal circuit. The delay monitor is configured so that a largest on-resistance of on-resistances for a plurality of transistors configuring the delay monitor is smaller than a largest on-resistance of on-resistances for a plurality of transistors configuring the internal circuit.
Public/Granted literature
- US20190074829A1 SEMICONDUCTOR DEVICE, SEMICONDUCTOR SYSTEM, AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD Public/Granted day:2019-03-07
Information query
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