A three-dimensional stacked integrated circuit (3D SIC) for implementing an artificial neural network (ANN) having a memory die having an array of memory partitions. Each partition of the array of memory partitions is configured to store parameters of a set of neurons. The 3D SIC also has a processing logic die having an array of processing logic partitions. Each partition of the array of processing logic partitions is configured to: receive input data, and process the input data according to the set of neurons to generate output data.