Invention Grant
- Patent Title: Method of selectively depositing a capping layer structure on a semiconductor device structure
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Application No.: US15815483Application Date: 2017-11-16
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Publication No.: US10910262B2Publication Date: 2021-02-02
- Inventor: Aurélie Kuroda , Akiko Kobayashi , Dai Ishikawa
- Applicant: ASM IP Holding B.V.
- Applicant Address: NL Almere
- Assignee: ASM IP Holding B.V.
- Current Assignee: ASM IP Holding B.V.
- Current Assignee Address: NL Almere
- Agency: Snell & Wilmer L.L.P.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/768 ; H01L23/532 ; H01L21/285

Abstract:
A method of selectively depositing a capping layer structure on a semiconductor device structure is disclosure. The method may include; providing a partially fabricated semiconductor device structure comprising a surface including a metallic interconnect material, a metallic barrier material, and a dielectric material. The method may also include; selectively depositing a first metallic capping layer over the metallic barrier material and over the metallic interconnect material relative to the dielectric material; and selectively depositing a second metallic capping layer over the first metallic capping layer relative to the dielectric material. Semiconductor device structures including a capping layer structure are also disclosed.
Public/Granted literature
- US20190148224A1 METHOD OF SELECTIVELY DEPOSITING A CAPPING LAYER STRUCTURE ON A SEMICONDUCTOR DEVICE STRUCTURE Public/Granted day:2019-05-16
Information query
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