Invention Grant
- Patent Title: Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
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Application No.: US16352203Application Date: 2019-03-13
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Publication No.: US10825718B2Publication Date: 2020-11-03
- Inventor: Igor Peidous , Jeffrey L. Libbert
- Applicant: GlobalWafers Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: GlobalWafers Co., Ltd.
- Current Assignee: GlobalWafers Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Armstrong Teasdale LLP
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L21/304 ; H01L21/02 ; H01L21/761 ; H01L29/06 ; H01L21/322 ; H01L21/265
Abstract:
A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm and an isolation region that impedes the transfer of charge carriers along the surface of the handle substrate and reduces parasitic coupling between RF devices.
Public/Granted literature
- US20190214294A1 METHOD OF PREPARING AN ISOLATION REGION IN A HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE Public/Granted day:2019-07-11
Information query
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