Invention Grant
- Patent Title: Circuit and layout for single gate type precharge circuit for data lines in memory device
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Application No.: US16197185Application Date: 2018-11-20
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Publication No.: US10770462B2Publication Date: 2020-09-08
- Inventor: Shinichi Miyatake
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: H01L27/108
- IPC: H01L27/108 ; G11C11/4091 ; G11C11/4076 ; G11C5/02 ; G11C7/08 ; G11C11/4074 ; G11C11/4094 ; G11C11/4097 ; H01L27/112

Abstract:
Some embodiments include apparatus and methods using a first diffusion region, a second diffusion region, a third diffusion region, and a fourth diffusion region; a first channel region located between a portion of the first diffusion region and a portion of the third diffusion region; a second channel region located between the portion of the third diffusion region and a portion of the second diffusion region; a third channel region located between the portion of the second diffusion region and a portion of the fourth diffusion region; and a gate located over the first, second, and third channel regions. The first and second diffusion regions are located on a first side of the gate. The third and fourth diffusion regions are located on a second side of the gate opposite from the first side.
Public/Granted literature
- US20190088654A1 CIRCUIT AND LAYOUT FOR SINGLE GATE TYPE PRECHARGE CIRCUIT FOR DATA LINES IN MEMORY DEVICE Public/Granted day:2019-03-21
Information query
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