Invention Grant
- Patent Title: Transistor with recessed cross couple for gate contact over active region integration
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Application No.: US16009200Application Date: 2018-06-15
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Publication No.: US10770388B2Publication Date: 2020-09-08
- Inventor: Ruilong Xie , Veeraraghavan S. Basker , Kangguo Cheng , Jia Zeng , Youngtag Woo , Mahender Kumar , Guillaume Bouche
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Garg Law Firm, PLLC
- Agent Rakesh Garg; Joseph Petrokaitis
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L21/027 ; H01L21/768 ; H01L21/8234 ; H01L27/088 ; H01L23/535 ; H01L27/11

Abstract:
A semiconductor structure includes a substrate having a first region and a second region, a first source/drain disposed on the substrate in the first region, an interlevel dielectric (ILD) disposed on the source/drain, and a first gate disposed on the substrate. The semiconductor structure further includes a first contact trench within the ILD extending to the first source/drain, a first trench contact within the first contact trench, and a first source/drain contact trench extending to the first trench contact. The semiconductor structure further includes a cross couple contact trench within the ILD, and a cross couple contact disposed in the cross couple contact trench in contact with the first gate and the first trench contact. The cross couple contact couples the first source/drain and the first gate.
Public/Granted literature
- US20190385946A1 TRANSISTOR WITH RECESSED CROSS COUPLE FOR GATE CONTACT OVER ACTIVE REGION INTEGRATION Public/Granted day:2019-12-19
Information query
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