Invention Grant
- Patent Title: Memory with error correction function and an error correction method
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Application No.: US15982131Application Date: 2018-05-17
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Publication No.: US10769012B2Publication Date: 2020-09-08
- Inventor: Alessandro Minzoni
- Applicant: XI'AN UNIIC SEMICONDUCTORS CO., LTD.
- Applicant Address: CN Xi'an Shaanxi
- Assignee: XI'AN UNIIC SEMICONDUCTORS CO., LTD.
- Current Assignee: XI'AN UNIIC SEMICONDUCTORS CO., LTD.
- Current Assignee Address: CN Xi'an Shaanxi
- Agency: Leydig, Voit & Mayer, Ltd.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@57db50d6
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C29/52 ; G11C29/42 ; G11C29/04

Abstract:
The present invention relates to a memory with error correction function, comprising a data array, an ECC array, a flag bit array, an ECC encoding module, an ECC decoding module, a flag bit generation module and a flag bit detection module; wherein: the flag bit generation module is configured, when data is being written, to generate a flag bit and an encode enable signal, the flag bit being stored in the flag bit array, and the encode enable signal being used to control the operation of the ECC encoding module; the ECC encoding module is configured to encode the data to be written according to the ECC algorithm preset therein so as to generate parity bits; the ECC array is configured to store the generated parity bits; the flag bit detection module is configured, when data is being read, to detect the flag bit and control the operation of the ECC decoding module; and the ECC decoding module is configured to detect and correct erroneous data using the parity bits from the ECC array and the data from the data array, and to output the corrected data. The invention also relates to a method of correcting errors in a memory.
Public/Granted literature
- US20180336090A1 Memory with Error Correction Function and an Error Correction Method Public/Granted day:2018-11-22
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