Invention Grant
- Patent Title: Calibrating time-interleaved switched-capacitor track-and-hold circuits and amplifiers
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Application No.: US16364134Application Date: 2019-03-25
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Publication No.: US10763878B2Publication Date: 2020-09-01
- Inventor: Ahmed Mohamed Abdelatty Ali , Paridhi Gulati , Bryan S. Puckett , Huseyin Dinc
- Applicant: Analog Devices, Inc.
- Applicant Address: US MA Norwood
- Assignee: ANALOG DEVICES, INC.
- Current Assignee: ANALOG DEVICES, INC.
- Current Assignee Address: US MA Norwood
- Agency: Patent Capital Group
- Main IPC: H03M1/10
- IPC: H03M1/10 ; H03M1/06

Abstract:
Background calibration techniques can effectively to correct for memory, kick-back, and order-dependent errors in interleaved switched-capacitor track-and-hold (T/H) circuits and amplifiers. The techniques calibrate for errors in both the track/sample phase and the hold-phase, and account for the effects of interleaving, buffer/amplifier sharing, incomplete resetting, incomplete settling, chopping, and randomization on the offset, gain, memory, and kick-back errors. Moreover, the techniques can account for order-dependent and state-dependent hold-phase non-linearities. By correcting for these errors, the proposed techniques improve the noise performance, linearity, gain/offset matching, frequency response (and bandwidth), and order-dependence errors. The techniques also help increase the speed (sample rate and bandwidth) and linearity of T/H circuits and amplifiers while simplifying the analog circuitry and clocking needed. These techniques comprehensively account for various memory, kick-back, and order-dependent effects in a unified framework.
Public/Granted literature
- US20190305791A1 CALIBRATING TIME-INTERLEAVED SWITCHED-CAPACITOR TRACK-AND-HOLD CIRCUITS AND AMPLIFIERS Public/Granted day:2019-10-03
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