Invention Grant
- Patent Title: Semiconductor integrated circuit
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Application No.: US16672797Application Date: 2019-11-04
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Publication No.: US10763854B2Publication Date: 2020-09-01
- Inventor: Takahide Tanaka
- Applicant: Fuji Electric Co., Ltd.
- Applicant Address: JP Kanagawa
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kanagawa
- Agency: Chen Yoshimura LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@4622ef2a
- Main IPC: H03K17/687
- IPC: H03K17/687 ; H01L29/78 ; H01L29/10 ; H03K3/356

Abstract:
A semiconductor integrated circuit includes a level shifter formed in a portion of a high-voltage junction termination structure and an isolation region formed surrounding the periphery of the level shifter. The level shifter includes a p-type base region formed in an upper portion of a p− substrate, an n− source region formed contacting the base region, an n+ drift region formed contacting the base region, a drain region formed in an upper portion of the drift region, and a control electrode that controls the voltage of the base region. In a planar pattern, an effective channel width defined by the width of the base region in a portion that overlaps with the control electrode is greater than the width of the drain region as measured along the same direction as the effective channel width.
Public/Granted literature
- US20200177180A1 SEMICONDUCTOR INTEGRATED CIRCUIT Public/Granted day:2020-06-04
Information query
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