Invention Grant
- Patent Title: Three dimensional semiconductor memory including pillars having joint portions between columnar sections
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Application No.: US16118567Application Date: 2018-08-31
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Publication No.: US10763276B2Publication Date: 2020-09-01
- Inventor: Hideto Takekida
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@7e4537b3
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; G11C16/28 ; H01L29/792 ; H01L27/1157 ; G11C16/04
Abstract:
According to one embodiment, a semiconductor memory includes a plurality of conductors stacked with insulators being interposed therebetween and a pillar through the plurality of conductors. The pillar includes a first columnar section, a second columnar section, and a joint portion between the first columnar section and the second columnar section. The pillar comprises portions that cross the respective conductors and that each function as part of a transistor. The plurality of conductors include a first conductor. The first conductor is closest to the joint portion among the plurality of conductors through the second columnar section, and includes a bending portion formed along the joint portion.
Public/Granted literature
- US20190198522A1 SEMICONDUCTOR MEMORY Public/Granted day:2019-06-27
Information query
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