Invention Grant
- Patent Title: Thin semiconductor package and related methods
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Application No.: US16395822Application Date: 2019-04-26
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Publication No.: US10763173B2Publication Date: 2020-09-01
- Inventor: Shutesh Krishnan , Sw Wei Wang , Ch Chew , How Kiat Liew , Fui Fui Tan
- Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Applicant Address: US AZ Phoenix
- Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: Adam R. Stephenson, LTD.
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/00 ; H01L21/306 ; H01L23/482 ; H01L21/56 ; H01L23/31 ; H01L29/06

Abstract:
Implementations of a method of forming a semiconductor package may include forming a plurality of notches into a first side of a wafer, the first side of the wafer including a plurality of electrical contacts. The method may also include coating the first side of the wafer and an interior of the plurality of notches with a molding compound, grinding a second side of the wafer to thin the wafer to a desired thickness, forming a back metal on a second side of the wafer, exposing the plurality of electrical contacts through grinding a first side of the molding compound, and singulating the wafer at the plurality of notches to form a plurality of semiconductor packages.
Public/Granted literature
- US20190252255A1 THIN SEMICONDUCTOR PACKAGE AND RELATED METHODS Public/Granted day:2019-08-15
Information query
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