Invention Grant
- Patent Title: Scanning-line drive circuit
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Application No.: US15395547Application Date: 2016-12-30
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Publication No.: US10762865B2Publication Date: 2020-09-01
- Inventor: Youichi Tobita
- Applicant: MITSUBISHI ELECTRIC CORPORATION
- Applicant Address: JP Chiyoda-ku
- Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee: MITSUBISHI ELECTRIC CORPORATION
- Current Assignee Address: JP Chiyoda-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@3f555248
- Main IPC: G09G3/36
- IPC: G09G3/36 ; H03K5/156 ; H03K5/135 ; G11C27/04

Abstract:
A gate-line drive circuit is driven by three clock signals of different phases, and includes a plurality of cascade-connected unit shift registers. In a normal operation, activation periods of the three clock signals do not overlap one another. However, the two clock signals of them are simultaneously activated at the beginning of a frame period. A unit shift register of the first stage is adapted to activate an output signal in accordance with the simultaneous activation of the two clock signals.
Public/Granted literature
- US20170110077A1 SCANNING-LINE DRIVE CIRCUIT Public/Granted day:2017-04-20
Information query
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