Invention Grant
- Patent Title: Information processing apparatus and control method for suppressing obstacle
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Application No.: US16508363Application Date: 2019-07-11
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Publication No.: US10762026B2Publication Date: 2020-09-01
- Inventor: Naokazu Onda , Hirotoshi Inoue , Hiroaki Watanabe
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Fujitsu Patent Center
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@4e605b48
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G06F11/30 ; G06F13/12

Abstract:
An information processing apparatus includes an interface switching circuit including a first hardware interface to which a first device part is coupled; and a first processor including a second hardware interface, wherein the interface switching circuit is configured to block, when hot-removal of the first device part is detected, a signal path between the first hardware interface and the second hardware interface, and cancel, when diagnosis for a second device part newly hot-inserted in the first hardware interface is completed, the blocking of the signal path in response to a result of the diagnosis, and the first processor is configured to detect presence of the second device part from that the first processor transits from a non-responsive state to a responsible state, and execute an initialization process for the second device part.
Public/Granted literature
- US20200050572A1 INFORMATION PROCESSING APPARATUS AND CONTROL METHOD Public/Granted day:2020-02-13
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