Invention Grant
- Patent Title: Nanosheet single gate (SG) and extra gate (EG) field effect transistor (FET) co-integration
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Application No.: US16006173Application Date: 2018-06-12
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Publication No.: US10741660B2Publication Date: 2020-08-11
- Inventor: Nicolas J. Loubet , Siva Kanakasabapathy , Kangguo Cheng , Jingyun Zhang
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, P.C.
- Agent Vazken Alexanian
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L21/311 ; H01L21/28 ; H01L29/66

Abstract:
A method of forming a semiconductor device that includes providing a first stack of nanosheets having a first thickness and a second stack of nanosheets having a second thickness; and forming a oxide layer on the first and second stack of nanosheets. The oxide layer fills a space between said nanosheets in the first stack, and is conformally present on the nanosheets in the second stack. The method further includes forming a work function metal layer on the first and second stack of nanosheets. In some embodiments, the work function metal layer is present on only exterior surfaces of the first stack to provide a single gate structure and is conformally present about an entirety of the nanosheets in the second stack to provide a multiple gate structure.
Public/Granted literature
- US20190378906A1 NANOSHEET SINGLE GATE (SG) AND EXTRA GATE (EG) FIELD EFFECT TRANSISTOR (FET) CO-INTEGRATION Public/Granted day:2019-12-12
Information query
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