Invention Grant
- Patent Title: High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
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Application No.: US16718952Application Date: 2019-12-18
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Publication No.: US10741437B2Publication Date: 2020-08-11
- Inventor: Gang Wang , Jeffrey L. Libbert , Shawn George Thomas , Qingmin Liu
- Applicant: GlobalWafers Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: GlobalWafers Co., Ltd.
- Current Assignee: GlobalWafers Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Armstrong Teasdale LLP
- Main IPC: H01L21/762
- IPC: H01L21/762 ; H01L27/12 ; H01L21/02 ; H01L29/786
Abstract:
A multilayer semiconductor on insulator structure is provided in which the handle substrate and an epitaxial layer in interfacial contact with the handle substrate comprise electrically active dopants of opposite type. The epitaxial layer is depleted by the handle substrate free carriers, thereby resulting in a high apparent resistivity, which improves the function of the structure in RF devices.
Public/Granted literature
- US20200126847A1 HIGH RESISTIVITY SILICON-ON-INSULATOR SUBSTRATE HAVING ENHANCED CHARGE TRAPPING EFFICIENCY Public/Granted day:2020-04-23
Information query
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