Invention Grant
- Patent Title: Smart mapping table update post background operations
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Application No.: US16364054Application Date: 2019-03-25
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Publication No.: US10732877B1Publication Date: 2020-08-04
- Inventor: Raghavendra Gopalakrishnan , Nicholas Thomas , Karin Inbar
- Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
- Applicant Address: US CA San Jose
- Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
- Current Assignee Address: US CA San Jose
- Agency: Morgan, Lewis & Bockius LLP
- Main IPC: G06F3/06
- IPC: G06F3/06 ; G06F12/02 ; G11C11/56

Abstract:
In one embodiment, there is a method for managing data in a storage device comprising a non-volatile memory having a plurality of jumbo blocks, each jumbo block having a separate and distinct physical block address. The method comprises performing a folding operation data associated with a first virtual address from a plurality of Single Level Cell (SLC) jumbo blocks of the non-volatile memory to one Multilevel Cell (MLC) jumbo block of the non-volatile memory, receiving a read request to read data associated with a first logical block address, identifying that the first virtual address is associated with the first logical block address, determining whether a jumbo block associated with the first logical block address meets pre-SLC-overwrite criteria. In response to a determination that the jumbo block associated with the first logical block address meets pre-SLC-overwrite criteria, reading data from the SLC jumbo block associated with the first virtual address. In response to a determination that the jumbo block associated with the first logical block address does not meet pre-SLC-overwrite criteria, reading data from the MLC jumbo block associated with the first virtual address.
Information query