An integrated circuit for testing a circuit includes a controller configured to select a loopback path of the circuit. The circuit includes a data path and an inverter, and each is electrically coupled to the selected loopback path. The integrated circuit includes a counter electrically coupled to the selected loopback path. The circuit is configured to receive a first voltage signal that is either a substantially low logic level signal or a substantially high logic level signal. The circuit is configured to generate an oscillating signal from the first voltage signal, and the counter is configured to count oscillations of the oscillating signal.