Invention Grant
- Patent Title: Comparator, AD converter, solid-state imaging apparatus, electronic apparatus, and method of controlling comparator
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Application No.: US16325296Application Date: 2017-08-08
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Publication No.: US10707852B2Publication Date: 2020-07-07
- Inventor: Masaki Sakakibara
- Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
- Applicant Address: JP Kanagawa
- Assignee: Sony Semiconductor Solutions Corporation
- Current Assignee: Sony Semiconductor Solutions Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sheridan Ross P.C.
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@17c5b197
- International Application: PCT/JP2017/028673 WO 20170808
- International Announcement: WO2018/037901 WO 20180301
- Main IPC: H03K5/24
- IPC: H03K5/24 ; H03M1/56 ; H04N5/3745 ; H03K5/08 ; H03K19/0185 ; H03M1/00 ; H04N5/378 ; H03M1/34 ; H04N5/369 ; H03M1/12 ; H03K19/20

Abstract:
The present disclosure relates to a comparator, an AD converter, a solid-state imaging apparatus, an electronic apparatus, and a method of controlling a comparator each of which enables power consumption to be reduced while a decision speed of the comparator is enhanced. A comparator, including: a differential input circuit operating at a first power source voltage, and outputting a signal when a voltage of an input signal is higher than a voltage of a reference signal; a positive feedback circuit operating at a second power source voltage lower than the first power source voltage, and speeding up a transition speed when a comparison result signal representing a result of comparison in voltage between the input signal and the reference signal is inverted; and a voltage converting circuit. The present disclosure can be applied to an ADC or the like arranged for each pixel of a solid-state imaging apparatus.
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