Invention Grant
- Patent Title: High voltage galvanic isolation device
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Application No.: US16178065Application Date: 2018-11-01
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Publication No.: US10707297B2Publication Date: 2020-07-07
- Inventor: Jeffrey Alan West , Thomas D. Bonifield , Byron Lovell Williams
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Charles A. Brill; Frank D. Cimino
- Main IPC: H01L49/02
- IPC: H01L49/02 ; H01L29/06 ; H01L21/02 ; H01L21/8234 ; H01L29/78 ; H01L29/66 ; H01L23/522 ; H01L27/06

Abstract:
A microelectronic device contains a high voltage component having a high voltage node and a low voltage node. The high voltage node is isolated from the low voltage node by a main dielectric between the high voltage node and low voltage elements at a surface of the substrate of the microelectronic device. A lower-bandgap dielectric layer is disposed between the high voltage node and the main dielectric. The lower-bandgap dielectric layer contains at least one sub-layer with a bandgap energy less than a bandgap energy of the main dielectric. The lower-bandgap dielectric layer extends beyond the high voltage node continuously around the high voltage node. The lower-bandgap dielectric layer has an isolation break surrounding the high voltage node at a distance of at least twice the thickness of the lower-bandgap dielectric layer from the high voltage node.
Public/Granted literature
- US20190074350A1 HIGH VOLTAGE GALVANIC ISOLATION DEVICE Public/Granted day:2019-03-07
Information query
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