Invention Grant
- Patent Title: Germanium-rich channel transistors including one or more dopant diffusion barrier elements
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Application No.: US16474446Application Date: 2017-04-01
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Publication No.: US10692973B2Publication Date: 2020-06-23
- Inventor: Glenn A. Glass , Anand S. Murthy , Karthik Jambunathan , Benjamin Chu-Kung , Seung Hoon Sung , Jack T. Kavalieros , Tahir Ghani , Harold W. Kennel
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Finch & Maloney PLLC
- International Application: PCT/US2017/025644 WO 20170401
- International Announcement: WO2018/182749 WO 20181004
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/00 ; H01L29/00 ; H01L29/10 ; H01L21/02 ; H01L21/22 ; H01L21/768 ; H01L21/8238 ; H01L27/092 ; H01L29/423 ; H01L29/66 ; H01L29/78

Abstract:
Techniques are disclosed for forming germanium (Ge)-rich channel transistors including one or more dopant diffusion barrier elements. The introduction of one or more dopant diffusion elements into at least a portion of a given source/drain (S/D) region helps inhibit the undesired diffusion of dopant (e.g., B, P, or As) into the adjacent Ge-rich channel region. In some embodiments, the elements that may be included in a given S/D region to help prevent the undesired dopant diffusion include at least one of tin and relatively high silicon. Further, in some such embodiments, carbon may also be included to help prevent the undesired dopant diffusion. In some embodiments, the one or more dopant diffusion barrier elements may be included in an interfacial layer between a given S/D region and the Ge-rich channel region and/or throughout at least a majority of a given S/D region. Numerous embodiments, configurations, and variations will be apparent.
Information query
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