Invention Grant

Die embedding
Abstract:
A power semiconductor device package includes a power semiconductor die having a first load terminal at a die frontside and a second load terminal at a die backside. The package has a package top side, a package footprint side, and a first terminal interface and a second terminal interface arranged at the package footprint side. The first terminal interface is electrically connected with the first load terminal. The die is disposed in a main cavity of an insulating core layer. A conductive material is provided at a cavity sidewall of the main cavity, and an insulation structure is provided in the main cavity. The insulation structure embeds the die, with the die backside facing the package top side. An electrical connection provided between the second load terminal and the second terminal interface is formed by at least the conductive material at the cavity sidewall.
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