Invention Grant
- Patent Title: Die embedding
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Application No.: US15919746Application Date: 2018-03-13
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Publication No.: US10692803B2Publication Date: 2020-06-23
- Inventor: Petteri Palm
- Applicant: Infineon Technologies Austria AG
- Applicant Address: AT Villach
- Assignee: Infineon Technologies Austria AG
- Current Assignee: Infineon Technologies Austria AG
- Current Assignee Address: AT Villach
- Agency: Murphy, Bilak & Homiller, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@7505d43f
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/31 ; H01L23/538 ; H01L21/48 ; H01L21/52 ; H01L21/56 ; H01L23/16

Abstract:
A power semiconductor device package includes a power semiconductor die having a first load terminal at a die frontside and a second load terminal at a die backside. The package has a package top side, a package footprint side, and a first terminal interface and a second terminal interface arranged at the package footprint side. The first terminal interface is electrically connected with the first load terminal. The die is disposed in a main cavity of an insulating core layer. A conductive material is provided at a cavity sidewall of the main cavity, and an insulation structure is provided in the main cavity. The insulation structure embeds the die, with the die backside facing the package top side. An electrical connection provided between the second load terminal and the second terminal interface is formed by at least the conductive material at the cavity sidewall.
Public/Granted literature
- US20180269146A1 Die Embedding Public/Granted day:2018-09-20
Information query
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