Invention Grant
- Patent Title: Semiconductor structure and fabrication method with precise patterning thereof
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Application No.: US16101128Application Date: 2018-08-10
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Publication No.: US10692731B2Publication Date: 2020-06-23
- Inventor: Cheng Long Zhang , Shi Liang Ji
- Applicant: Semiconductor Manufacturing International (Shanghai) Corporation , Semiconductor Manufacturing International (Beijing) Corporation
- Applicant Address: CN Shanghai CN Beijing
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation,Semiconductor Manufacturing International (Beijing) Corporation
- Current Assignee Address: CN Shanghai CN Beijing
- Agency: Anova Law Group, PLLC
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@da39684
- Main IPC: H01L21/32
- IPC: H01L21/32 ; H01L21/8238 ; H01L21/311 ; H01L21/266 ; H01L21/027 ; H01L21/033 ; H01L29/66 ; H01L27/092 ; H01L29/78
Abstract:
Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a base substrate having a first region and a second region; forming a first filling layer on the first region of the base substrate and a first hard mask layer on the first filling layer; performing a first treatment process on the second region of the base substrate using the first hard mask layer and the first filling layer as a mask; forming a second filling layer on the first region of the base substrate and a second mask on at least the second filling layer; removing the first hard mask layer and the first filling layer to expose the first region of the base substrate and to pattern the second hard mask layer on the second filling layer; and performing a second treatment process on the first region of the base substrate.
Public/Granted literature
- US20190067127A1 SEMICONDUCTOR STRUCTURE AND FABRICATION METHOD THEREOF Public/Granted day:2019-02-28
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