Invention Grant
- Patent Title: Variable resistance memory stack with treated sidewalls
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Application No.: US16417320Application Date: 2019-05-20
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Publication No.: US10692572B2Publication Date: 2020-06-23
- Inventor: Yongjun Jeff Hu , Tsz W. Chan , Christopher W. Petz , Everett Allen McTeer
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G11C13/00
- IPC: G11C13/00 ; H01L45/00 ; H01L27/24

Abstract:
Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming a memory stack out of a plurality of elements. A sidewall liner is formed on a sidewall of the memory stack using a physical vapor deposition (PVD) process, including an adhesion species and a dielectric, such that the adhesion species intermixes with an element of the memory stack to terminate unsatisfied atomic bonds of the element and the dielectric forms a dielectric film with the adhesive species on the sidewall.
Public/Granted literature
- US20190362785A1 VARIABLE RESISTANCE MEMORY STACK WITH TREATED SIDEWALLS Public/Granted day:2019-11-28
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