Disclosed herein is an apparatus that includes a first pair of signal lines and a second pair of signal lines. Each pair of signal lines comprises a first line and a second line that collectively signal any one of: a logical zero, a logical one, and nothing. A first cell occupies a first layer of the apparatus to receive the first line of the first pair of signal lines and the first line of the second pair of signal lines; and a second cell occupies a second layer of the apparatus to receive the second line of the first pair of signal lines and the second line of the second pair of signal lines. The first cell is a dual of the second cell and at least partially overlaps the second cell.