This application relates to the technical field of semiconductors, and discloses a semiconductor device, an MOS capacitor, and manufacturing methods therefor. Forms of a method for manufacturing the device may include: providing a substrate structure, including: a first fin and a second fin that are on the substrate and that are separated; a first pseudo gate structure on the first fin, including a first pseudo gate dielectric layer and a first pseudo gate thereon; a second pseudo gate structure on the second fin, including a second pseudo gate dielectric layer and a second pseudo gate thereon; and an interlayer dielectric layer around the first pseudo gate structure and the second pseudo gate structure, an upper surface of the interlayer dielectric layer is approximately flush with upper surfaces of the first pseudo gate and the second pseudo gate; removing a portion of the first pseudo gate to form a first recess, and removing the second pseudo gate structure to form a second recess, where an upper surface of a remaining portion of the first pseudo gate is higher than an upper surface of the first pseudo gate dielectric layer that is at a top portion of the first fin; and forming a first metal gate stack structure in the first recess, and forming a second metal gate stack structure in the second recess.