Invention Grant
- Patent Title: Resistance change type memory
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Application No.: US16351308Application Date: 2019-03-12
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Publication No.: US10686012B2Publication Date: 2020-06-16
- Inventor: Kenichi Murooka
- Applicant: TOSHIBA MEMORY CORPORATION
- Applicant Address: JP Tokyo
- Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee: TOSHIBA MEMORY CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: com.zzzhc.datahub.patent.etl.us.BibliographicData$PriorityClaim@18d579f4
- Main IPC: H01L27/24
- IPC: H01L27/24 ; H01L45/00 ; G11C13/00

Abstract:
According to one embodiment, a resistance change type memory includes: a semiconductor substrate having a first impurity concentration; a first interconnect extending in a first direction perpendicular to a surface of the semiconductor substrate; a second interconnect including a first semiconductor layer, the first semiconductor layer extending in a second direction parallel to the surface of the semiconductor substrate and having a second impurity concentration lower than the first impurity concentration; a memory layer between the first interconnect and the first semiconductor layer; a transistor including a second semiconductor layer between the first interconnect and the semiconductor substrate; and a third interconnect between the semiconductor substrate and the second semiconductor layer, and extending in the third direction.
Public/Granted literature
- US20200098827A1 RESISTANCE CHANGE TYPE MEMORY Public/Granted day:2020-03-26
Information query
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