Invention Grant
- Patent Title: Semiconductor memory device
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Application No.: US16178336Application Date: 2018-11-01
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Publication No.: US10685976B2Publication Date: 2020-06-16
- Inventor: Hiroyasu Tanaka , Tomoaki Shino
- Applicant: Toshiba Memory Corporation
- Applicant Address: JP Minato-ku
- Assignee: Toshiba Memory Corporation
- Current Assignee: Toshiba Memory Corporation
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H01L27/11582
- IPC: H01L27/11582 ; H01L27/11573 ; H01L27/11526

Abstract:
A semiconductor memory device includes a memory plane including a plurality of electrode layers stacked on a substrate and a semiconductor layer extending through the plurality of electrode layers in a stacking direction thereof, a circuit provided on the substrate around the memory plane, a first insulating layer covering the circuit, and a second insulating layer including a first portion and a second portion between the substrate and the first insulating layer. The first portion is provided along an outer edge of the memory plane, and the second portion is spaced from the first portion and is provided on the circuit side. The first insulating layer includes a part in contact with the substrate between the first portion and the second portion, and the first insulating layer blocks a diffusion of hydrogen radicals with a higher rate than the second insulating layer.
Public/Granted literature
- US20190074293A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2019-03-07
Information query
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